Current mirroring circuits are well known in the art. These circuits operate to mirror an input reference current to an output current. The ratio of the magnitude of the output current to the input current is referred to as the mirroring ratio. Some current mirror implementations switch on the output transistor providing the output current. Due to the time delay associated with charging the gate capacitance of the output transistor, there is a time delay in the output current reaching peak magnitude. This “settling time” for the output current can introduce problems with the operation of downstream circuitry supplied with a signal output from the current mirror.
There is a need in the art to address the foregoing problem.